ISP/sim/sc_main.cpp

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// For std::unique_ptr
#include <memory>
// SystemC global header
#include <systemc>
// Include common routines
#include <sys/stat.h> // mkdir
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#include <verilated.h>
#include <verilated_vcd_sc.h>
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// Include model header, generated from Verilating "isp.v"
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#include "Visp.h"
// Handle file
#include <fstream>
#include <iostream>
// math
#include <cmath>
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#include "bmp.hpp"
static const uint16_t IN_WIDTH = 1936;
static const uint16_t IN_HEIGHT = 1088;
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#define IN_SIZE (IN_WIDTH * IN_HEIGHT)
static const uint16_t OUT_WIDTH = 1920;
static const uint16_t OUT_HEIGHT = 1080;
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#define OUT_SIZE (OUT_WIDTH * OUT_HEIGHT)
struct color_gain
{
double red;
double green;
double blue;
}color_gain {1.0, 0.5, 1.1};
using namespace std;
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using namespace sc_core;
using namespace sc_dt;
SC_MODULE(TB_ISP) {
sc_in_clk clk;
sc_in<bool> reset;
sc_in<bool> in_ready;
sc_in<bool> in_receive;
sc_out<bool> out_en;
sc_out<uint32_t> out_data[3];
sc_in<bool> im_clk;
sc_in<bool> im_en;
sc_out<bool> out_ready;
sc_out<bool> out_receceive;
sc_in<uint32_t> im_data;
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sc_out<bool> is_done;
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unique_ptr<uint16_t[]> image = make_unique<uint16_t[]>(IN_SIZE);
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unique_ptr<uint32_t[]> out = make_unique<uint32_t[]>(OUT_SIZE);
SC_CTOR(TB_ISP) {
SC_CTHREAD(send_Data, clk.pos());
reset_signal_is(reset, true);
SC_CTHREAD(read_Data, im_clk.pos());
}
void send_Data(void) {
uint16_t pos_x = 0, pos_y = 0;
while (true) {
if (in_ready.read() && pos_y < IN_HEIGHT - 2) {
out_en.write(1);
printf("x=%4d, y=%4d, data=0x%04x\t", pos_x, pos_y,
image[(pos_y + 0) * IN_WIDTH + pos_x]);
printf("x=%4d, y=%4d, data=0x%04x\t", pos_x, pos_y,
image[(pos_y + 1) * IN_WIDTH + pos_x]);
printf("x=%4d, y=%4d, data=0x%04x\n", pos_x, pos_y,
image[(pos_y + 2) * IN_WIDTH + pos_x]);
out_data[0].write(image[(pos_y + 0) * IN_WIDTH + pos_x]);
out_data[1].write(image[(pos_y + 1) * IN_WIDTH + pos_x]);
out_data[2].write(image[(pos_y + 2) * IN_WIDTH + pos_x]);
// wait(1);
// out_en.write(0);
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if (++pos_x >= IN_WIDTH) {
pos_x = 0;
pos_y++;
}
} else {
out_en.write(0);
}
wait();
}
}
void read_Data(void) {
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is_done.write(0);
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uint16_t pos_x = 0, pos_y = 0;
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uint32_t last_data = 0;
uint32_t cnt = 0;
while (true) {
if (im_en.read()) {
out_ready.write(false);
out_receceive.write(true);
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out[pos_y * OUT_WIDTH + pos_x] = im_data.read();
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if (pos_x++ >= OUT_WIDTH) {
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pos_x = 0;
pos_y++;
}
} else {
out_ready.write(true);
out_receceive.write(false);
}
// when data didn't change some time, it end
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if (last_data == im_data.read()) {
cnt++;
if (cnt >= 100000L) {
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is_done.write(1);
printf("x=%d, y=%d\n", pos_x, pos_y);
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}
} else {
cnt = 0;
}
last_data = im_data.read();
wait();
}
}
};
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int sc_main(int argc, char* argv[]) {
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cout << "Get into sc_main" << endl;
// Open image
ifstream in_image;
ofstream out_image;
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in_image.open("./transform/test.bin", ios::in | ios::binary);
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out_image.open("./transform/out.bin", ios::out | ios::binary);
if (!in_image.is_open()) {
cout << "Open image fail" << endl;
exit(0);
} else {
cout << "Ready to sim" << endl;
}
// Read image
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auto buf = make_unique<uint8_t[]>(2 * IN_SIZE);
in_image.read((char*)buf.get(), IN_SIZE * 2);
in_image.close();
// Reshape data
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auto image = make_unique<uint16_t[]>(IN_SIZE);
uint32_t i = 0;
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for (int y = 0; y < IN_HEIGHT; y++) {
for (int x = 0; x < IN_WIDTH; x++) {
image[y * IN_WIDTH + x] =
(uint16_t)buf[i] + ((uint16_t)buf[i + 1] << 8);
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i += 2;
}
}
cout << "Finish Reading data" << endl;
// This is a more complicated example, please also see the simpler
// examples/make_hello_c.
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// Create logs/ directory in case we have traces to put under it
Verilated::mkdir("logs");
// Set debug level, 0 is off, 9 is highest presently used
// May be overridden by commandArgs argument parsing
Verilated::debug(0);
// Randomization reset policy
// May be overridden by commandArgs argument parsing
Verilated::randReset(2);
// Before any evaluation, need to know to calculate those signals only used
// for tracing
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Verilated::traceEverOn(true);
// Pass arguments so Verilated code can see them, e.g. $value$plusargs
// This needs to be called before you create any model
Verilated::commandArgs(argc, argv);
// General logfile
std::ios::sync_with_stdio();
// Define clocks
sc_clock clk{"clk", 10, SC_NS, 0.5, 3, SC_NS, true};
// Define interconnect
sc_signal<bool> reset;
sc_signal<bool> in_en;
sc_signal<bool> in_ready;
sc_signal<bool> in_receive;
sc_signal<uint32_t> in_data[3];
sc_signal<bool> out_clk;
sc_signal<bool> out_en;
sc_signal<bool> out_ready;
sc_signal<bool> out_receive;
sc_signal<uint32_t> out_data;
sc_signal<bool> color_correction;
sc_signal<uint32_t> gain_red;
sc_signal<uint32_t> gain_green;
sc_signal<uint32_t> gain_blue;
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sc_signal<bool> flag_done;
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// Construct the Verilated model, from inside Visp.h
// Using unique_ptr is similar to "Visp* isp = new Visp" then deleting at
// end
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const std::unique_ptr<Visp> isp{new Visp{"isp"}};
// Attach Visp's signals to this upper model
isp->clk(clk);
isp->reset(reset);
isp->in_en(in_en);
isp->in_ready(in_ready);
isp->in_receive(in_receive);
isp->in_data[0](in_data[0]);
isp->in_data[1](in_data[1]);
isp->in_data[2](in_data[2]);
isp->out_clk(out_clk);
isp->out_en(out_en);
isp->out_ready(out_ready);
isp->out_receive(out_receive);
isp->out_data(out_data);
isp->gain_red(gain_red);
isp->gain_green(gain_green);
isp->gain_blue(gain_blue);
isp->color_correction(color_correction);
color_correction.write(true); // enable color correction
gain_red.write((uint32_t)(color_gain.red * std::pow(2, 8)));
gain_green.write((uint32_t)(color_gain.green * std::pow(2, 8)));
gain_blue.write((uint32_t)(color_gain.blue * std::pow(2, 8)));
// Construct testbench module
TB_ISP tb_isp("tb_isp");
tb_isp.clk(clk);
tb_isp.reset(reset);
tb_isp.in_ready(out_ready);
tb_isp.in_receive(out_receive);
tb_isp.out_en(in_en);
tb_isp.out_ready(in_ready);
tb_isp.out_receceive(in_receive);
tb_isp.out_data[0](in_data[0]);
tb_isp.out_data[1](in_data[1]);
tb_isp.out_data[2](in_data[2]);
tb_isp.im_clk(out_clk);
tb_isp.im_en(out_en);
tb_isp.im_data(out_data);
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tb_isp.is_done(flag_done);
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tb_isp.image = move(image);
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// You must do one evaluation before enabling waves, in order to allow
// SystemC to interconnect everything for testing.
sc_start(SC_ZERO_TIME);
// If verilator was invoked with --trace argument,
// and if at run time passed the +trace argument, turn on tracing
VerilatedVcdSc* tfp = nullptr;
const char* flag = Verilated::commandArgsPlusMatch("trace");
if (flag && 0 == std::strcmp(flag, "+trace")) {
std::cout << "Enabling waves into logs/vlt_dump.vcd...\n";
tfp = new VerilatedVcdSc;
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isp->trace(tfp, 99); // Trace 99 levels of hierarchy
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Verilated::mkdir("logs");
tfp->open("logs/vlt_dump.vcd");
}
// Simulate until $finish
while (!Verilated::gotFinish()) {
// Flush the wave files each cycle so we can immediately see the output
// Don't do this in "real" programs, do it in an abort() handler instead
if (tfp) tfp->flush();
// Apply inputs
if (sc_time_stamp() < sc_time(10, SC_NS)) {
reset.write(1); // Assert reset
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} else {
reset.write(0); // Deassert reset
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}
if (flag_done.read()) break;
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// Simulate 1ns
sc_start(1, SC_NS);
}
// Final model cleanup
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isp->final();
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// Close trace if opened
if (tfp) {
tfp->close();
tfp = nullptr;
}
// Save output image
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cout << "Ready to save raw RGB image" << endl;
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// for (int y = 0; y < OUT_HEIGHT; y++)
// for(int x = 0; x < OUT_WIDTH; x++)
// out_image.write((const char *)&tb_isp.out[y * OUT_WIDTH + x],
// sizeof(tb_isp.out[0]));
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// out_image.close();
// save to image
uint8_t* data =
new uint8_t[OUT_WIDTH * OUT_HEIGHT * 3]; // RGB24格式像素数据
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for (int32_t y = 0; y < OUT_HEIGHT; ++y) {
for (int32_t x = 0; x < OUT_WIDTH; ++x) {
int32_t index = (y * OUT_WIDTH + x) * 3;
uint8_t red = (tb_isp.out[y * OUT_WIDTH + x] & 0x00ff0000) >> 16;
uint8_t green = (tb_isp.out[y * OUT_WIDTH + x] & 0x0000ff00) >> 8;
uint8_t blue = (tb_isp.out[y * OUT_WIDTH + x] & 0x000000ff);
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out_image.write((const char*)&red, sizeof(red));
out_image.write((const char*)&green, sizeof(green));
out_image.write((const char*)&blue, sizeof(blue));
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printf("x=%4d, y=%4d, red=0x%02x, green=0x%02x, blue=0x%02x\n", x,
y, red, green, blue);
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data[index + 0] = red; // R
data[index + 1] = green; // G
data[index + 2] = blue; // B
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}
}
// for (int i = 0; i < OUT_WIDTH * OUT_HEIGHT * 3; i += 3) {
// data[i + 0] = std::min(255, static_cast<int>(data[i + 0] *
// red_gain)); data[i + 1] = std::min(255, static_cast<int>(data[i + 1]
// * green_gain)); data[i + 2] = std::min(255, static_cast<int>(data[i +
// 2] * blue_gain));
// }
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write_bmp("test.bmp", data, OUT_WIDTH, OUT_HEIGHT);
delete[] data;
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// Return good completion status
return 0;
}