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- Verilog 64.9%
- C++ 25.7%
- SystemVerilog 8.8%
- CMake 0.4%
- Nix 0.1%
| Filename | Latest commit message | Latest commit date |
|---|---|---|
| rtl | ||
| src | ||
| .envrc | ||
| .gitignore | ||
| .justfile | ||
| .svlint.toml | ||
| .svls.toml | ||
| CMakeLists.txt | ||
| flake.lock | ||
| flake.nix | ||
| FPGA.nix | ||
| xmake.lua | ||