fix some bugs

RAM/RGB_to_RAM.v

@@ -8,7 +8,7 @@ module RGB_to_RAM #(
     input reset,
 
     // 数据输入
-    output in_que,
+    output reg in_que,
     input in_en,
     input [3 * COLOR_DEPTH - 1:0] data_in,
 
@@ -39,10 +39,12 @@ module RGB_to_RAM #(
         .winc(in_en),
         .wdata(fifo_data),
         .wfull(fifo_full),
+        .awfull(),
 
         .rinc(write_en),
         .rdata(data_write),
-        .rempty(fifo_empty)
+        .rempty(fifo_empty),
+        .arempty()
     );
     
     // 当有数据请求且FIFO不为空时，输出数据
@@ -57,8 +59,6 @@ module RGB_to_RAM #(
 
     always @(posedge clk or posedge reset) begin
         if (reset) begin
-            write_en <= 0;
-            data_write <= 0;
             fifo_data <= 0;
             data_cache <= 0;
         end