SikongJueluo
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ISP
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26 Commits 1 Branch 0 Tags 11 MiB
Verilog 60.1%
C++ 25.7%
SystemVerilog 8.8%
Coq 4.8%
CMake 0.4%
Other 0.1%
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SikongJueluo daf1f454fe
add color correction function into chanels to RGB 		2024-05-20 18:46:26 +08:00
Crop add color correction function into chanels to RGB 2024-05-20 18:46:26 +08:00
Demosaic fix offset bug 2024-05-18 21:10:17 +08:00
FIFO change fifo source and finish testbench file for isp 2024-05-16 17:15:25 +08:00
Merge add color correction function into chanels to RGB 2024-05-20 18:46:26 +08:00
RAM finish isp testbench but still have some errors waiting to be deat with 2024-05-15 16:35:17 +08:00
Scaler update scaler and RAM 2024-05-11 21:53:35 +08:00
sim add color correction function into chanels to RGB 2024-05-20 18:46:26 +08:00
.gitignore update software sim 2024-05-18 18:56:32 +08:00
isp.v add color correction function into chanels to RGB 2024-05-20 18:46:26 +08:00