SikongJueluo c807c24456 isp pipeline pass sim

2024-10-03 17:06:40 +08:00

rtl

isp pipeline pass sim

2024-10-03 17:06:40 +08:00

src

isp pipeline pass sim

2024-10-03 17:06:40 +08:00

.envrc

switch lsp to clangd and reconstruct project

2024-09-15 22:04:48 +08:00

.gitignore

switch lsp to clangd and reconstruct project

2024-09-15 22:04:48 +08:00

CMakeLists.txt

isp pipeline pass sim

2024-10-03 17:06:40 +08:00

flake.lock

switch lsp to clangd and reconstruct project

2024-09-15 22:04:48 +08:00

flake.nix

switch lsp to clangd and reconstruct project

2024-09-15 22:04:48 +08:00

FPGA.nix

use cmake to replace makefiel

2024-10-03 15:13:24 +08:00

xmake.lua

isp pipeline pass sim

2024-10-03 17:06:40 +08:00

Description

No description provided

9.6 MiB

Languages

Verilog 60.1%

C++ 25.7%

SystemVerilog 8.8%

Coq 4.8%

CMake 0.4%

Other 0.1%