ISP/sim/sc_main.cpp

295 lines
8.5 KiB
C++

// For std::unique_ptr
#include <memory>
// SystemC global header
#include <systemc>
// Include common routines
#include <verilated.h>
#include <verilated_vcd_sc.h>
#include <sys/stat.h> // mkdir
// Include model header, generated from Verilating "isp.v"
#include "Visp.h"
// Handle file
#include <fstream>
#include <iostream>
#include "bmp.hpp"
#define IN_WIDTH 1936
#define IN_HEIGHT 1088
#define IN_SIZE (IN_WIDTH * IN_HEIGHT)
#define OUT_WIDTH 1920
#define OUT_HEIGHT 1080
#define OUT_SIZE (OUT_WIDTH * OUT_HEIGHT)
using namespace std;
using namespace sc_core;
using namespace sc_dt;
SC_MODULE (TB_ISP) {
sc_in_clk clk;
sc_in<bool> reset;
sc_in<bool> data_que;
sc_out<bool> data_en;
sc_out<uint32_t> data_out[3];
sc_in<bool> im_clk;
sc_in<bool> im_en;
sc_in<uint32_t> im_data;
sc_out<bool> is_done;
unique_ptr<uint16_t[]> image = make_unique<uint16_t[]>(IN_SIZE);
unique_ptr<uint32_t[]> out = make_unique<uint32_t[]>(OUT_SIZE);
SC_CTOR (TB_ISP) {
SC_CTHREAD(send_Data, clk.pos());
reset_signal_is(reset, true);
SC_CTHREAD(read_Data, im_clk.pos());
}
void send_Data(void) {
uint16_t pos_x = 0, pos_y = 0;
while (true)
{
if (data_que.read() && pos_y < IN_HEIGHT - 2) {
data_en.write(1);
printf("x=%4d, y=%4d, data=0x%04x\t", pos_x, pos_y, image[( pos_y + 0 ) * IN_WIDTH + pos_x]);
printf("x=%4d, y=%4d, data=0x%04x\t", pos_x, pos_y, image[( pos_y + 1 ) * IN_WIDTH + pos_x]);
printf("x=%4d, y=%4d, data=0x%04x\n", pos_x, pos_y, image[( pos_y + 2 ) * IN_WIDTH + pos_x]);
data_out[0].write(image[( pos_y + 0 ) * IN_WIDTH + pos_x]);
data_out[1].write(image[( pos_y + 1 ) * IN_WIDTH + pos_x]);
data_out[2].write(image[( pos_y + 2 ) * IN_WIDTH + pos_x]);
wait(1);
data_en.write(0);
if (++pos_x >= IN_WIDTH) {
pos_x = 0;
pos_y++;
}
} else {
data_en.write(0);
}
wait();
}
}
void read_Data(void) {
is_done.write(0);
uint16_t pos_x = 0, pos_y = 0;
uint32_t last_data = 0;
uint16_t cnt = 0;
while (true)
{
if (im_en.read()) {
out[pos_y * OUT_WIDTH + pos_x] = im_data.read();
if (pos_x++ >= OUT_WIDTH) {
pos_x = 0;
pos_y++;
}
}
if (last_data == im_data.read()) {
cnt++;
if (cnt >= 10000) {
is_done.write(1);
}
} else {
cnt = 0;
}
last_data = im_data.read();
wait();
}
}
};
int sc_main(int argc, char* argv[]) {
cout << "Get into sc_main" << endl;
// Open image
ifstream in_image;
ofstream out_image;
in_image.open("./transform/test.bin", ios::in | ios::binary);
out_image.open("./transform/out.bin", ios::out | ios::binary);
if (!in_image.is_open()) {
cout << "Open image fail" << endl;
exit(0);
} else {
cout << "Ready to sim" << endl;
}
// Read image
auto buf = make_unique<uint8_t[]>(2 * IN_SIZE);
in_image.read((char*)buf.get(), IN_SIZE * 2);
in_image.close();
// Reshape data
auto image = make_unique<uint16_t[]>(IN_SIZE);
uint32_t i = 0;
for (int y = 0; y < IN_HEIGHT; y++) {
for (int x = 0; x < IN_WIDTH; x++) {
image[y * IN_WIDTH + x] = (uint16_t)buf[i] + ((uint16_t)buf[i + 1] << 8);
i += 2;
}
}
cout << "Finish Reading data" << endl;
// This is a more complicated example, please also see the simpler examples/make_hello_c.
// Create logs/ directory in case we have traces to put under it
Verilated::mkdir("logs");
// Set debug level, 0 is off, 9 is highest presently used
// May be overridden by commandArgs argument parsing
Verilated::debug(0);
// Randomization reset policy
// May be overridden by commandArgs argument parsing
Verilated::randReset(2);
// Before any evaluation, need to know to calculate those signals only used for tracing
Verilated::traceEverOn(true);
// Pass arguments so Verilated code can see them, e.g. $value$plusargs
// This needs to be called before you create any model
Verilated::commandArgs(argc, argv);
// General logfile
std::ios::sync_with_stdio();
// Define clocks
sc_clock clk{"clk", 10, SC_NS, 0.5, 3, SC_NS, true};
// Define interconnect
sc_signal<bool> reset;
sc_signal<bool> data_en;
sc_signal<bool> data_que;
sc_signal<uint32_t> data_in[3];
sc_signal<bool> out_clk;
sc_signal<bool> out_en;
sc_signal<uint32_t> data_out;
sc_signal<bool> flag_done;
// Construct the Verilated model, from inside Visp.h
// Using unique_ptr is similar to "Visp* isp = new Visp" then deleting at end
const std::unique_ptr<Visp> isp{new Visp{"isp"}};
// Attach Visp's signals to this upper model
isp->clk(clk);
isp->reset(reset);
isp->data_en(data_en);
isp->data_que(data_que);
isp->data_in[0](data_in[0]);
isp->data_in[1](data_in[1]);
isp->data_in[2](data_in[2]);
isp->out_clk(out_clk);
isp->out_en(out_en);
isp->data_out(data_out);
// Construct testbench module
TB_ISP tb_isp("tb_isp");
tb_isp.clk(clk);
tb_isp.reset(reset);
tb_isp.data_que(data_que);
tb_isp.data_en(data_en);
tb_isp.data_out[0](data_in[0]);
tb_isp.data_out[1](data_in[1]);
tb_isp.data_out[2](data_in[2]);
tb_isp.im_clk(out_clk);
tb_isp.im_en(out_en);
tb_isp.im_data(data_out);
tb_isp.is_done(flag_done);
tb_isp.image = move(image);
// You must do one evaluation before enabling waves, in order to allow
// SystemC to interconnect everything for testing.
sc_start(SC_ZERO_TIME);
// If verilator was invoked with --trace argument,
// and if at run time passed the +trace argument, turn on tracing
VerilatedVcdSc* tfp = nullptr;
const char* flag = Verilated::commandArgsPlusMatch("trace");
if (flag && 0 == std::strcmp(flag, "+trace")) {
std::cout << "Enabling waves into logs/vlt_dump.vcd...\n";
tfp = new VerilatedVcdSc;
isp->trace(tfp, 99); // Trace 99 levels of hierarchy
Verilated::mkdir("logs");
tfp->open("logs/vlt_dump.vcd");
}
// Simulate until $finish
while (!Verilated::gotFinish()) {
// Flush the wave files each cycle so we can immediately see the output
// Don't do this in "real" programs, do it in an abort() handler instead
if (tfp) tfp->flush();
// Apply inputs
if (sc_time_stamp() < sc_time(10, SC_NS)) {
reset.write(1); // Assert reset
} else {
reset.write(0); // Deassert reset
}
if (flag_done.read())
break;
// Simulate 1ns
sc_start(1, SC_NS);
}
// Final model cleanup
isp->final();
// Close trace if opened
if (tfp) {
tfp->close();
tfp = nullptr;
}
// Save output image
cout << "Ready to save raw RGB image" << endl;
// for (int y = 0; y < OUT_HEIGHT; y++)
// for(int x = 0; x < OUT_WIDTH; x++)
// out_image.write((const char *)&tb_isp.out[y * OUT_WIDTH + x], sizeof(tb_isp.out[0]));
// out_image.close();
// save to image
uint8_t* data = new uint8_t[OUT_WIDTH * OUT_HEIGHT * 3]; // RGB24格式像素数据
for (int32_t y = 0; y < OUT_HEIGHT; ++y) {
for (int32_t x = 0; x < OUT_WIDTH; ++x) {
int32_t index = (y * OUT_WIDTH + x) * 3;
uint8_t red = ( tb_isp.out[y * OUT_WIDTH + x] & 0x00ff0000 ) >> 16;
uint8_t green = ( tb_isp.out[y * OUT_WIDTH + x] & 0x0000ff00 ) >> 8;
uint8_t blue = ( tb_isp.out[y * OUT_WIDTH + x] & 0x000000ff );
out_image.write((const char *)&red, sizeof(red));
out_image.write((const char *)&green, sizeof(green));
out_image.write((const char *)&blue, sizeof(blue));
printf("x=%4d, y=%4d, red=0x%02x, green=0x%02x, blue=0x%02x\n", x, y, red, green, blue);
data[index + 0] = red; // R
data[index + 1] = green; // G
data[index + 2] = blue; // B
}
}
write_bmp("test.bmp", data, OUT_WIDTH, OUT_HEIGHT);
delete[] data;
// Return good completion status
return 0;
}