128 lines
3.2 KiB
Verilog
128 lines
3.2 KiB
Verilog
`timescale 1ns / 1ps
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module isp #(
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parameter reg [15:0] IN_WIDTH = 1936,
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parameter reg [15:0] IN_HEIGHT = 1088,
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parameter reg [15:0] OUT_WIDTH = 1920,
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parameter reg [15:0] OUT_HEIGHT = 1080,
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parameter reg [ 4:0] COLOR_DEPTH = 8,
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parameter reg [ 1:0] RAW_TYPE = 3 // 0:grbg 1:rggb 2:bggr 3:gbrg
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) (
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// 基本信号
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input wire clk,
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input wire reset,
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// 数据输入信号
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input wire in_en,
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input wire [15:0] in_data[3], // 数据输入线，0、1、2分别表示第一、二、三行
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output wire out_ready, // 数据请求线，高电平：请求三个数据，直到读取完才拉低
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output wire out_receive,
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output wire out_clk,
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output wire out_en,
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output wire [3 * COLOR_DEPTH - 1:0] out_data,
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input wire in_ready,
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input wire in_receive,
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// 颜色校正，低八位为小数位，高八位为整数位
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input wire [15:0] gain_red,
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input wire [15:0] gain_green,
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input wire [15:0] gain_blue,
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input wire color_correction // 是否启用颜色校正
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);
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localparam reg [15:0] BAYER_WIDTH = IN_WIDTH - 2;
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localparam reg [15:0] BAYER_HEIGHT = IN_HEIGHT - 2;
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// 三通道合成RGB图像
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wire blender_en, blender_ready, blender_receive;
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wire [15:0] blender_r, blender_g, blender_b;
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// 任意比例缩放图像
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wire crop_en, crop_ready, crop_receive; // scaler 请求数据
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reg [3 * COLOR_DEPTH - 1:0] crop_data;
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// 写入RAM
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// wire RAM_in_en;
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// wire RAM_in_que; // RAM 请求数据
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// wire [3 * COLOR_DEPTH - 1:0] RAM_in_data;
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assign out_clk = clk;
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Demosaic2 #(
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.IM_WIDTH (IN_WIDTH),
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.IM_HEIGHT(IN_HEIGHT),
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.RAW_TYPE (RAW_TYPE)
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) CFA (
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.clk(clk),
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.reset(reset),
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.in_en(in_en),
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.in_data(in_data),
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.out_ready(out_ready),
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.out_receive(out_receive),
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.out_en(blender_en),
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.in_ready(blender_ready),
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.in_receive(blender_receive),
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.out_r(blender_r),
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.out_g(blender_g),
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.out_b(blender_b)
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);
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ColorBlender #(
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.IN_DEPTH (12),
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.OUT_DEPTH(8)
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) blender (
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.clk (clk),
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.reset(reset),
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.in_en(blender_en),
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.in_data({blender_r, blender_g, blender_b}),
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.out_ready(blender_ready),
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.out_receive(blender_receive),
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.in_ready(crop_ready),
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.in_receive(crop_receive),
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.out_en(crop_en),
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.out_data(crop_data),
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.gain_red(gain_red),
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.gain_green(gain_green),
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.gain_blue(gain_blue),
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.color_correction(color_correction)
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);
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Crop #(
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.IN_WIDTH(BAYER_WIDTH),
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.IN_HEIGHT(BAYER_HEIGHT),
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.OUT_WIDTH(OUT_WIDTH),
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.OUT_HEIGHT(OUT_HEIGHT),
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.COLOR_DEPTH(COLOR_DEPTH)
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) crop_process (
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.clk (clk),
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.reset(reset),
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.in_en(crop_en),
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.out_ready(crop_ready),
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.out_receive(crop_receive),
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.in_data(crop_data),
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.out_en(out_en),
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.in_ready(in_ready),
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.in_receive(in_receive),
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.out_data(out_data)
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);
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// RGB_to_RAM write_to_RAM (
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// .clk(clk),
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// .reset(reset),
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// .in_en(RAM_in_en),
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// .in_que(RAM_in_que),
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// .in_data(RAM_in_data),
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// .write_que(out_que),
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// .write_en(out_en),
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// .data_write(out_data)
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// );
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endmodule
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