65 lines
1.9 KiB
CMake
65 lines
1.9 KiB
CMake
cmake_minimum_required(VERSION 3.29.6)
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cmake_policy(SET CMP0074 NEW)
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project(ISP CXX)
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# Add Macro to get all subdir
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MACRO(SUBDIRLIST result curdir)
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FILE(GLOB children RELATIVE ${curdir} ${curdir}/*)
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SET(dirlist "")
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FOREACH(child ${children})
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IF(IS_DIRECTORY ${curdir}/${child})
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LIST(APPEND dirlist ${curdir}/${child})
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ENDIF()
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ENDFOREACH()
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SET(${result} ${dirlist})
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ENDMACRO()
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# Set C++ Standard
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set(CMAKE_CXX_STANDARD 17)
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set(CMAKE_CXX_STANDARD_REQUIRED true)
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# Find Verilator
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find_package(verilator HINTS $ENV{VERILATOR_ROOT} ${VERILATOR_ROOT})
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if(NOT verilator_FOUND)
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message(
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FATAL_ERROR
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"Verilator was not found. Either install it, or set the VERILATOR_ROOT environment variable"
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)
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endif()
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# SystemC dependencies
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set(THREADS_PREFER_PTHREAD_FLAG ON)
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find_package(Threads REQUIRED)
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# Find SystemC using SystemC's CMake integration
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find_package(SystemCLanguage QUIET)
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# Create software image process library
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file(GLOB_RECURSE IMG_SRC ${PROJECT_SOURCE_DIR}/src/img_process/*.cpp)
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add_library(img_process STATIC ${IMG_SRC})
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# Create a new executable target
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file(GLOB_RECURSE VISP_SRC ${PROJECT_SOURCE_DIR}/src/*.cpp)
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add_executable(Visp ${VISP_SRC})
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target_compile_definitions(Visp
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PRIVATE INPUT_IMG="${PROJECT_SOURCE_DIR}/src/transform/test.bin"
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PRIVATE OUTPUT_DIR="${PROJECT_SOURCE_DIR}/logs/"
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)
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target_include_directories(Visp PRIVATE ${PROJECT_SOURCE_DIR}/src/img_process)
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target_link_libraries(Visp PRIVATE img_process)
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# target_compile_features(Visp PUBLIC cxx_std_17)
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# set_property(TARGET Visp PROPERTY CXX_STANDARD ${SystemC_CXX_STANDARD})
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# Add the Verilated circuit to the target
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SUBDIRLIST(RTL_SUBDIR ${PROJECT_SOURCE_DIR}/rtl)
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verilate(Visp SYSTEMC COVERAGE TRACE
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INCLUDE_DIRS ${RTL_SUBDIR}
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VERILATOR_ARGS +librescan +libext+.v+.sv+.vh+.svh -y . -x-assign fast
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SOURCES ${PROJECT_SOURCE_DIR}/rtl/isp.sv
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TOP_MODULE isp
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)
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# SystemC Link
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verilator_link_systemc(Visp)
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