110 lines
2.6 KiB
Systemverilog
110 lines
2.6 KiB
Systemverilog
`timescale 1ns / 1ps
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module isp_tb();
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parameter IN_WIDTH = 50;
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parameter IN_HEIGHT = 50;
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parameter OFFSET_X = 7;
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parameter OFFSET_Y = 3;
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parameter OUT_WIDTH = 30;
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parameter OUT_HEIGHT = 30;
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parameter COLOR_DEPTH = 8;
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parameter RAW_TYPE = 3;
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reg clk;
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initial clk = 0;
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always #20 clk <= ~clk;
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reg[31:0] cnt_www;
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reg reset;
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initial begin
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reset = 1;
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cnt_www = 700;
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#500
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reset = 0;
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#5000000
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reset = 1;
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cnt_www = 2000;
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#500
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reset = 0;
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end
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reg [15:0] in_data[3];
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wire [23:0]out_data;
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reg in_valid;
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wire out_valid;
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reg in_ready;
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wire out_ready;
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reg[31:0] cnt_valid, cnt_ready;
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integer i;
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always @(posedge clk) begin
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if(reset) begin
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in_valid <= 0;
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in_ready <= 0;
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cnt_valid <= 10;
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cnt_ready <= 0;
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for(i=0;i<3;i=i+1) in_data[i] <= 0;
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end else begin
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cnt_valid <= cnt_valid+1;
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cnt_ready <= cnt_ready+1;
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if(cnt_ready==cnt_www)begin
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cnt_ready <= 0;
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in_ready <= ~in_ready;
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end
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if(cnt_valid==500)begin
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cnt_valid <= 200;
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in_valid <= ~in_valid;
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end
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if(in_valid && out_ready)begin
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in_data[0] <= in_data[0] + 1;
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for(i=1;i<3;i=i+1) in_data[i] <= in_data[i-1];
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end
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end
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end
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reg [23:0] data_out_temp[8192*5];
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reg [31:0] now;
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reg flag_ifdataerror;
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always @(posedge clk) begin
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if(reset) begin
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flag_ifdataerror <= 0;
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if(cnt_www==700) for(i=0;i<(1<<32);i=i+1) data_out_temp[i] <= 0;
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now <= 0;
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end else if(out_valid && in_ready)begin
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now <= now + 1;
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if(cnt_www==700)begin
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data_out_temp[now] <= out_data;
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end else if(cnt_www==2000)begin
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flag_ifdataerror <= (data_out_temp[now] != out_data);
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end else flag_ifdataerror <= flag_ifdataerror;
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end
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end
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isp_nofifo
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#(
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.IN_WIDTH (IN_WIDTH ),
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.IN_HEIGHT (IN_HEIGHT ),
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.OFFSET_X (OFFSET_X ),
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.OFFSET_Y (OFFSET_Y ),
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.OUT_WIDTH (OUT_WIDTH ),
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.OUT_HEIGHT (OUT_HEIGHT ),
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.COLOR_DEPTH (COLOR_DEPTH ),
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.RAW_TYPE (RAW_TYPE )
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)
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u_isp(
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.clk (clk ),
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.reset (reset ),
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.in_data (in_data ),
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.out_data (out_data ),
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.in_valid (in_valid ),
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.out_valid (out_valid ),
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.in_ready (in_ready ),
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.out_ready (out_ready ),
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.gain_red (50 ),
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.gain_green (50 ),
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.gain_blue (50 ),
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.blender_enable (0 )
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);
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endmodule |