SikongJueluo
/
ISP
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

change size of pic

This commit is contained in:
SelfConfusion 2024-05-10 13:07:58 +08:00
parent 2d29d809f5
commit 909efb3bd6
2 changed files with 32 additions and 23 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
.gitignore vendored
View File

@ -1,2 +1,4 @@
/CFA/sim/**
!/CFA/sim/demosaic.v
!/CFA/sim/demosaic.v
.idea/
!/CFA/sim/transform/**

51
CFA/demosaic.v
View File

@ -1,27 +1,34 @@
module demosaic(clk, reset, in_en, data_in, wr_r, addr_r, wdata_r, rdata_r, wr_g, addr_g, wdata_g, rdata_g, wr_b, addr_b, wdata_b, rdata_b, done);
input clk;
input reset;
input in_en;
input [7:0] data_in;
output reg wr_r;
output reg [13:0] addr_r;
output reg [7:0] wdata_r;
input [7:0] rdata_r;
output reg wr_g;
output reg [13:0] addr_g;
output reg [7:0] wdata_g;
input [7:0] rdata_g;
output reg wr_b;
output reg [13:0] addr_b;
output reg [7:0] wdata_b;
input [7:0] rdata_b;
output reg done;
module demosaic #(
parameter IM_WIDTH = 512,
parameter IM_HEIGHT = 256
)(
input clk,
input reset,
input in_en,
input [7:0] data_in,
output reg wr_r,
output reg [13:0] addr_r,
output reg [7:0] wdata_r,
input [7:0] rdata_r,
output reg wr_g,
output reg [13:0] addr_g,
output reg [7:0] wdata_g,
input [7:0] rdata_g,
output reg wr_b,
output reg [13:0] addr_b,
output reg [7:0] wdata_b,
input [7:0] rdata_b,
output reg done
);
parameter IM_SIZE = IM_HEIGHT * IM_WIDTH;
// Register
reg [1:0] bilinearCase;
reg [2:0] state, nextState;
reg [3:0] counter9;
reg [6:0] caseCounter, round;
reg [6:0] round;
reg [11:0] caseCounter;
reg [7:0] data [8:0];
reg [7:0] red, blue, green;
reg [14:0] counter, biCounter; // bicounter store the center address
@ -45,11 +52,11 @@ end
//next state logic
always @(*) begin
case (state)
READDATA: nextState = (counter == 15'd16384)? COLOR : READDATA;
READDATA: nextState = (counter == IM_SIZE)? COLOR : READDATA;
COLOR: nextState = STORE9;
STORE9: nextState = (counter9 == 4'd9)? BILINEAR : STORE9;
BILINEAR: nextState = WRITEDATA;
WRITEDATA: nextState = (biCounter == 15'd16257)? FINISH : COLOR;
WRITEDATA: nextState = (biCounter == ( IM_SIZE - IM_WIDTH + 1 ))? FINISH : COLOR;
FINISH: nextState = FINISH;
default: nextState = READDATA;
endcase
@ -234,7 +241,7 @@ always @(posedge clk or posedge reset) begin
wdata_r <= red;
wdata_g <= green;
wdata_b <= blue;
if(caseCounter == 7'd126) begin // Finish one row, then initialize the caseCounter
if(caseCounter == ( IM_WIDTH - 2 )) begin // Finish one row, then initialize the caseCounter
caseCounter <= 7'd0;
round <= round + 7'd1;
biCounter <= biCounter + 15'd3; // Skip the edge