111 lines
3.2 KiB
C++
111 lines
3.2 KiB
C++
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// For std::unique_ptr
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#include <memory>
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// SystemC global header
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#include <systemc>
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// Include common routines
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#include <verilated.h>
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#include <verilated_vcd_sc.h>
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#include <sys/stat.h> // mkdir
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// Include model header, generated from Verilating "top.v"
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#include "Vdemosaic2.h"
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using namespace sc_core;
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using namespace sc_dt;
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int sc_main(int argc, char* argv[]) {
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// This is a more complicated example, please also see the simpler examples/make_hello_c.
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// Create logs/ directory in case we have traces to put under it
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Verilated::mkdir("logs");
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// Set debug level, 0 is off, 9 is highest presently used
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// May be overridden by commandArgs argument parsing
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Verilated::debug(0);
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// Randomization reset policy
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// May be overridden by commandArgs argument parsing
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Verilated::randReset(2);
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// Before any evaluation, need to know to calculate those signals only used for tracing
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Verilated::traceEverOn(true);
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// Pass arguments so Verilated code can see them, e.g. $value$plusargs
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// This needs to be called before you create any model
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Verilated::commandArgs(argc, argv);
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// General logfile
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std::ios::sync_with_stdio();
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// Define clocks
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sc_clock clk{"clk", 10, SC_NS, 0.5, 3, SC_NS, true};
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// Define interconnect
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sc_signal<bool> reset;
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sc_signal<uint32_t> in_small;
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// Construct the Verilated model, from inside Vtop.h
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// Using unique_ptr is similar to "Vtop* top = new Vtop" then deleting at end
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const std::unique_ptr<Vdemosaic2> top{new Vdemosaic2{"top"}};
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// Attach Vtop's signals to this upper model
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top->clk(clk);
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top->reset(reset);
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// You must do one evaluation before enabling waves, in order to allow
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// SystemC to interconnect everything for testing.
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sc_start(SC_ZERO_TIME);
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// If verilator was invoked with --trace argument,
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// and if at run time passed the +trace argument, turn on tracing
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VerilatedVcdSc* tfp = nullptr;
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const char* flag = Verilated::commandArgsPlusMatch("trace");
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if (flag && 0 == std::strcmp(flag, "+trace")) {
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std::cout << "Enabling waves into logs/vlt_dump.vcd...\n";
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tfp = new VerilatedVcdSc;
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top->trace(tfp, 99); // Trace 99 levels of hierarchy
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Verilated::mkdir("logs");
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tfp->open("logs/vlt_dump.vcd");
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}
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// Simulate until $finish
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while (!Verilated::gotFinish()) {
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// Flush the wave files each cycle so we can immediately see the output
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// Don't do this in "real" programs, do it in an abort() handler instead
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if (tfp) tfp->flush();
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// Apply inputs
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if (sc_time_stamp() > sc_time(1, SC_NS) && sc_time_stamp() < sc_time(10, SC_NS)) {
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reset_l = !1; // Assert reset
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} else {
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reset_l = !0; // Deassert reset
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}
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// Simulate 1ns
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sc_start(1, SC_NS);
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}
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// Final model cleanup
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top->final();
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// Close trace if opened
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if (tfp) {
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tfp->close();
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tfp = nullptr;
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}
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// Coverage analysis (calling write only after the test is known to pass)
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#if VM_COVERAGE
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Verilated::mkdir("logs");
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VerilatedCov::write("logs/coverage.dat");
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#endif
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// Return good completion status
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return 0;
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}
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