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Mini-Nav/hw/syn/synth_cam_top_flat.ys
SikongJueluo 706d148a0b feat(hw): add CAM top-level synthesis infrastructure and fix RTL synthesis compatibility
- Add hw/syn/Makefile with hier/flat/full synth targets and artifact mirroring
- Add synth_cam_top_hier.ys for hierarchy-preserving resource estimation on Xilinx 7-series
- Add synth_cam_top_flat.ys for flattened Xilinx 7-series synthesis
- Add cam-synth just target for convenient invocation
- Guard runtime assertions (NUM_ROWS/LANES checks, noise seed checks, NOISE_BITS checks)
  behind SYNTHESIS guard in cam_core_banked, cam_read_noise, cam_write_noise, and noise_mask_grouped
- Fix shadowed 'return' variable in random128 xorshift128 function
2026-05-18 15:40:04 +08:00

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# synth_cam_top_flat.ys — Flattened CAM top synthesis for Xilinx Zynq-7020 / 7-series
# Run from hw/syn: yosys -s synth_cam_top_flat.ys
# Set include directories before reading RTL
verilog_defaults -push
verilog_defaults -add -I../rtl
verilog_defaults -add -I../rtl/core
verilog_defaults -add -I../rtl/noise
verilog_defaults -add -I../rtl/random
# Read RTL sources in canonical order
read_verilog -sv -D SYNTHESIS ../rtl/random/random128.sv
read_verilog -sv -D SYNTHESIS ../rtl/noise/noise_mask_grouped.sv
read_verilog -sv -D SYNTHESIS ../rtl/noise/cam_write_noise.sv
read_verilog -sv -D SYNTHESIS ../rtl/noise/cam_read_noise.sv
read_verilog -sv -D SYNTHESIS ../rtl/core/cam_core_banked.sv
read_verilog -sv -D SYNTHESIS ../rtl/core/popcount_pipeline.sv
read_verilog -sv -D SYNTHESIS ../rtl/core/match_engine_pipeline.sv
read_verilog -sv -D SYNTHESIS ../rtl/cam_noisy.sv
read_verilog -sv -D SYNTHESIS ../rtl/cam_top.sv
# Restore verilog defaults
verilog_defaults -pop
# Flattened Xilinx synthesis (includes proc, opt, fsm, memory, etc.)
synth_xilinx -family xc7 -top cam_top -flatten
# Ensure build directory exists for output files
exec -- mkdir -p build
# Write flattened Verilog netlist
write_verilog -attr2comment build/cam_top_synth.v
# Resource statistics (JSON to file via tee, not mixed into logs)
tee -q -o build/cam_top_flat_resources.json stat -tech xilinx -json
# Final checks
check -noinit