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refactor!: remove legacy match_engine and related CAM modules

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- Delete popcount.sv, argmax_update.sv, cam_core.sv, match_engine.sv
- Remove obsolete VERILOG_SOURCES entries from Makefile
- Update comment in cam_top.sv to reference match_engine_pipeline
- Add verilator to devenv.nix for simulation support
This commit is contained in:
SikongJueluo
2026-05-13 19:08:06 +08:00
parent 8f59a287c4
commit e1a34d6540
7 changed files with 3 additions and 289 deletions
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4
hw/sim/Makefile
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@@ -65,9 +65,6 @@ COMPILE_ARGS += -Wno-WIDTHEXPAND
COMPILE_ARGS += -Wno-UNOPTFLAT
endif
VERILOG_SOURCES += $(PWD)/../rtl/popcount.sv
VERILOG_SOURCES += $(PWD)/../rtl/argmax_update.sv
VERILOG_SOURCES += $(PWD)/../rtl/cam_core.sv
VERILOG_SOURCES += $(PWD)/../rtl/random/random128.sv
VERILOG_SOURCES += $(PWD)/../rtl/noise_mask_grouped.sv
VERILOG_SOURCES += $(PWD)/../rtl/cam_core_banked.sv
@@ -76,7 +73,6 @@ VERILOG_SOURCES += $(PWD)/../rtl/cam_read_noise.sv
VERILOG_SOURCES += $(PWD)/../rtl/popcount_pipeline.sv
VERILOG_SOURCES += $(PWD)/../rtl/match_engine_pipeline.sv
VERILOG_SOURCES += $(PWD)/../rtl/cam_noisy.sv
VERILOG_SOURCES += $(PWD)/../rtl/match_engine.sv
VERILOG_SOURCES += $(PWD)/../rtl/cam_top.sv
include $(shell uv run cocotb-config --makefiles)/Makefile.sim