refactor!: remove legacy match_engine and related CAM modules

- Delete popcount.sv, argmax_update.sv, cam_core.sv, match_engine.sv
- Remove obsolete VERILOG_SOURCES entries from Makefile
- Update comment in cam_top.sv to reference match_engine_pipeline
- Add verilator to devenv.nix for simulation support

hw/rtl/cam_top.sv

@@ -42,8 +42,8 @@ module cam_top #(
 
     // ── Internal signals ──
     logic storage_wr_ready;    // cam_noisy write-side ready
-    logic match_query_ready;   // match_engine idle
-    logic match_busy;          // match_engine scanning/result pending
+    logic match_query_ready;   // match_engine_pipeline idle
+    logic match_busy;          // match_engine_pipeline scanning/result pending
 
     // ── Internal valid forwarding ──
     logic storage_wr_valid;