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refactor(hw/sim): extract common cocotb make infrastructure into shared mk/ directory

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- Split monolithic hw/sim/Makefile into modular include files (mk/cocotb-common.mk, mk/rtl-sources.mk)
- Add per-module test Makefiles (cam_core_banked, cam_read_noise, cam_write_noise, match_engine_pipeline, perf, top)
- Add missing simulation tools (yosys, graphviz, xdot) to devenv.nix
- Fix path handling in sweep_noise.py and test modules to be HASH_BITS-aware
This commit is contained in:
SikongJueluo
2026-05-16 19:23:49 +08:00
parent 2e0e36eea5
commit ca167e79c6
27 changed files with 241 additions and 97 deletions
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9
hw/sim/tests/top/Makefile Normal file
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@@ -0,0 +1,9 @@
SIM_ROOT := $(abspath ../..)
RTL_ROOT := $(abspath $(SIM_ROOT)/../rtl)
include $(SIM_ROOT)/mk/rtl-sources.mk
TOPLEVEL := cam_top
COCOTB_TEST_MODULES := tests.top.test_cam_basic
VERILOG_SOURCES := $(RTL_CAM_TOP)
include $(SIM_ROOT)/mk/cocotb-common.mk