refactor(hw/sim): extract common cocotb make infrastructure into shared mk/ directory

- Split monolithic hw/sim/Makefile into modular include files (mk/cocotb-common.mk, mk/rtl-sources.mk)
- Add per-module test Makefiles (cam_core_banked, cam_read_noise, cam_write_noise, match_engine_pipeline, perf, top)
- Add missing simulation tools (yosys, graphviz, xdot) to devenv.nix
- Fix path handling in sweep_noise.py and test modules to be HASH_BITS-aware
This commit is contained in:
2026-05-16 19:23:49 +08:00
parent 2e0e36eea5
commit ca167e79c6
27 changed files with 241 additions and 97 deletions

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SIM_ROOT := $(abspath ../../..)
RTL_ROOT := $(abspath $(SIM_ROOT)/../rtl)
include $(SIM_ROOT)/mk/rtl-sources.mk
TOPLEVEL := cam_read_noise
COCOTB_TEST_MODULES := tests.modules.cam_read_noise.test_cam_read_noise
VERILOG_SOURCES := $(RTL_READ_NOISE)
HASH_BITS ?= 512
READ_NOISE_EN ?= 0
READ_NOISE_RATE_NUM ?= 0
READ_NOISE_RATE_DEN ?= 100
READ_NOISE_BITS ?= $(shell echo $$(( $(HASH_BITS) / 64 )))
include $(SIM_ROOT)/mk/cocotb-common.mk

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@@ -0,0 +1,49 @@
from __future__ import annotations
import cocotb
from cocotb.clock import Clock
from cocotb.triggers import RisingEdge
async def reset_read_noise(dut):
dut.rst_n.value = 0
dut.valid_i.value = 0
dut.row_ids_i.value = 0
dut.hashes_i.value = 0
dut.lane_valid_i.value = 0
for _ in range(3):
await RisingEdge(dut.clk)
dut.rst_n.value = 1
for _ in range(2):
await RisingEdge(dut.clk)
@cocotb.test()
async def read_noise_disabled_forwards_hashes_after_one_stage(dut):
cocotb.start_soon(Clock(dut.clk, 10, unit="ns").start())
await reset_read_noise(dut)
LANES = len(dut.lane_valid_i)
ROW_BITS = len(dut.row_ids_i) // LANES
HASH_BITS_PER_LANE = len(dut.hashes_i) // LANES
all_lanes_valid = (1 << LANES) - 1
hashes = 0
rows = 0
for lane in range(LANES):
hashes |= (lane + 0x55) << (lane * HASH_BITS_PER_LANE)
rows |= lane << (lane * ROW_BITS)
dut.hashes_i.value = hashes
dut.row_ids_i.value = rows
dut.lane_valid_i.value = all_lanes_valid
dut.valid_i.value = 1
await RisingEdge(dut.clk)
dut.valid_i.value = 0
await RisingEdge(dut.clk)
await RisingEdge(dut.clk)
assert int(dut.valid_o.value) == 1
assert int(dut.hashes_noisy_o.value) == hashes
assert int(dut.row_ids_o.value) == rows
assert int(dut.lane_valid_o.value) == all_lanes_valid