refactor(hw/sim): extract common cocotb make infrastructure into shared mk/ directory

- Split monolithic hw/sim/Makefile into modular include files (mk/cocotb-common.mk, mk/rtl-sources.mk)
- Add per-module test Makefiles (cam_core_banked, cam_read_noise, cam_write_noise, match_engine_pipeline, perf, top)
- Add missing simulation tools (yosys, graphviz, xdot) to devenv.nix
- Fix path handling in sweep_noise.py and test modules to be HASH_BITS-aware

hw/sim/mk/rtl-sources.mk

@@ -0,0 +1,23 @@
+ifndef RTL_ROOT
+$(error RTL_ROOT must be set before including mk/rtl-sources.mk)
+endif
+
+RTL_RANDOM := $(RTL_ROOT)/random/random128.sv
+
+RTL_NOISE_MASK := $(RTL_ROOT)/noise/noise_mask_grouped.sv
+RTL_WRITE_NOISE := $(RTL_NOISE_MASK) $(RTL_RANDOM) $(RTL_ROOT)/noise/cam_write_noise.sv
+RTL_READ_NOISE := $(RTL_NOISE_MASK) $(RTL_RANDOM) $(RTL_ROOT)/noise/cam_read_noise.sv
+
+RTL_CAM_CORE_BANKED := $(RTL_ROOT)/core/cam_core_banked.sv
+RTL_MATCH_ENGINE := \
+  $(RTL_ROOT)/core/popcount_pipeline.sv \
+  $(RTL_ROOT)/core/match_engine_pipeline.sv
+
+RTL_CAM_NOISY := \
+  $(RTL_CAM_CORE_BANKED) \
+  $(RTL_WRITE_NOISE) \
+  $(RTL_READ_NOISE) \
+  $(RTL_MATCH_ENGINE) \
+  $(RTL_ROOT)/cam_noisy.sv
+
+RTL_CAM_TOP := $(RTL_CAM_NOISY) $(RTL_ROOT)/cam_top.sv