This repository has been archived on 2025-10-29. You can view files and clone it. You cannot open issues or pull requests or push a commit.
Files
FPGA_WebLab/TODO.md
2025-07-03 13:49:57 +08:00

301 B

TODO

  1. 后端HTTP视频流

640*480, RGB565 0x0000_0000 + 25800

  1. 信号发生器界面导入.dat文件
  2. 示波器后端交互、前端界面
  3. 逻辑分析仪后端交互、前端界面
  4. 前端重构
  5. 数据库 —— 用户登录、板卡资源分配、板卡IP地址分配