Files
Mini-Nav/hw/syn/Makefile
SikongJueluo e4cbb5e30d feat(hw/rtl): implement full Top-K CAM search pipeline with serial result output
- add TOPK_K, FIFO_DEPTH, RESULT_SERIAL parameters to cam_params
- add candidate_fifo: synchronous ready/valid FIFO for (row, score) candidates
- add topk_tracker: tracks top-K candidates with clear/ready handshake
- add result_serializer: serializes packed Top-K array into rank-ordered stream
- refactor match_engine_pipeline from 4-state to 8-state Top-K pipeline
- extend cam_top with serial Top-K interface (result_rank/row/score/last)
- add backward-compatible top1_index/top1_score aliases from rank-0 beat
- add comprehensive tests for all new modules
2026-05-19 22:43:21 +08:00

79 lines
3.7 KiB
Makefile

#===============================================================================
# CAM Top Synthesis Makefile
# Targets: synth, hier, flat, clean
# Usage:
# make -C hw/syn synth (defaults, output in build/)
# make -C hw/syn synth OUT_DIR=/some/path (mirror artifacts)
# make -C hw/syn synth NUM_ROWS=8192 (override parameter)
# make -C hw/syn hier (hierarchy-only pass)
# make -C hw/syn flat (flattened-synthesis pass)
# make -C hw/syn clean (remove build/)
#===============================================================================
# ── Configurable variables (defaults) ─────────────────────────────────────────
YOSYS ?= yosys
TOP ?= cam_top
NUM_ROWS ?= 4096
HASH_BITS ?= 512
LANES ?= 8
TOPK_K ?= 4
FIFO_DEPTH ?= 16
OUT_DIR ?= build
# ── TOP enforcement (only cam_top is supported) ───────────────────────────────
ifneq ($(TOP),cam_top)
$(error error: only TOP=cam_top is supported)
endif
# ── Internal build directory ──────────────────────────────────────────────────
BUILD_DIR := build
# ── Fixed script and artifact names ───────────────────────────────────────────
HIER_SCRIPT := synth_cam_top_hier.ys
FLAT_SCRIPT := synth_cam_top_flat.ys
HIER_LOG := yosys_hier.log
FLAT_LOG := yosys_flat.log
HIER_JSON := cam_top_hier_resources.json
FLAT_JSON := cam_top_flat_resources.json
SYNTH_V := cam_top_synth.v
ARTIFACTS := $(HIER_JSON) $(FLAT_JSON) $(SYNTH_V) $(HIER_LOG) $(FLAT_LOG)
# ── Yosys command-line defines (always passed) ────────────────────────────────
# cam_params.svh uses `ifndef guards, so -D on the Yosys CLI overrides defaults.
# Use -D NAME=value syntax (Yosys 0.62); do NOT use -define.
YOSYS_DEFINES := -D NUM_ROWS=$(NUM_ROWS) -D HASH_BITS=$(HASH_BITS) -D LANES=$(LANES) -D TOPK_K=$(TOPK_K) -D FIFO_DEPTH=$(FIFO_DEPTH)
# ── Targets ───────────────────────────────────────────────────────────────────
.PHONY: synth hier flat clean
# ── Hierarchy resource reference pass ─────────────────────────────────────────
hier:
mkdir -p $(BUILD_DIR)
$(YOSYS) $(YOSYS_DEFINES) -l $(BUILD_DIR)/$(HIER_LOG) -s $(HIER_SCRIPT)
# ── Flattened Xilinx synthesis pass ───────────────────────────────────────────
flat:
mkdir -p $(BUILD_DIR)
$(YOSYS) $(YOSYS_DEFINES) -l $(BUILD_DIR)/$(FLAT_LOG) -s $(FLAT_SCRIPT)
# ── Full synthesis: hier + flat, then mirror artifacts to OUT_DIR if different ─
synth: hier flat
@if [ "$(abspath $(OUT_DIR))" != "$(abspath $(BUILD_DIR))" ]; then \
set -e; \
echo "Mirroring artifacts to $(OUT_DIR) ..."; \
mkdir -p "$(OUT_DIR)"; \
for f in $(ARTIFACTS); do \
if [ ! -f "$(BUILD_DIR)/$$f" ]; then \
echo "error: missing artifact $(BUILD_DIR)/$$f" >&2; \
exit 1; \
fi; \
cp "$(BUILD_DIR)/$$f" "$(OUT_DIR)/$$f"; \
done; \
fi
# ── Clean ─────────────────────────────────────────────────────────────────────
clean:
rm -rf $(BUILD_DIR)