mirror of
https://github.com/SikongJueluo/Mini-Nav.git
synced 2026-07-12 20:15:31 +08:00
SikongJueluo
8f59a287c4
- Add cam_core_banked.sv with 8-lane banked CAM core - Add cam_write_noise.sv and cam_read_noise.sv for grouped noise injection - Add noise_mask_grouped.sv generating grouped flip masks from 128-bit PRNG - Add match_engine_pipeline.sv with multi-stage pipelined top-1 selection - Add popcount_pipeline.sv for pipelined popcount operations - Refactor test_cam_basic.py with parametrized DUT introspection helpers - Add Python ref_model match_top1_with_read_noise() for read noise verification - Update Makefile with separate WRITE_NOISE_* and READ_NOISE_* parameter groups - Add new testbenches: test_cam_core_banked, test_cam_read_noise, test_cam_write_noise, test_match_engine_pipeline, test_ref_model_noise breaking change hint: NUM_ROWS default changed from 512→4096, LANES from 16→8
40 lines
1.0 KiB
Python
40 lines
1.0 KiB
Python
from __future__ import annotations
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import cocotb
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from cocotb.clock import Clock
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from cocotb.triggers import RisingEdge
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from model.ref_model import generate_write_flip_mask
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async def reset_write_noise(dut):
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dut.rst_n.value = 0
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dut.wr_valid.value = 0
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dut.wr_row.value = 0
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dut.wr_hash.value = 0
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for _ in range(3):
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await RisingEdge(dut.clk)
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dut.rst_n.value = 1
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for _ in range(2):
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await RisingEdge(dut.clk)
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@cocotb.test()
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async def write_noise_outputs_grouped_noisy_hash(dut):
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cocotb.start_soon(Clock(dut.clk, 10, unit="ns").start())
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await reset_write_noise(dut)
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value = 0x123456789ABCDEF
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dut.wr_row.value = 3
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dut.wr_hash.value = value
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dut.wr_valid.value = 1
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await RisingEdge(dut.clk)
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dut.wr_valid.value = 0
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while int(dut.core_wr_valid.value) == 0:
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await RisingEdge(dut.clk)
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seed = 0xB504_F32D_B504_F32D
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flip, _ = generate_write_flip_mask((seed << 64) | seed, 512, 8, 1, 100)
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assert int(dut.core_wr_row.value) == 3
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assert int(dut.core_wr_hash.value) == (value ^ flip)
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