SIM_ROOT := $(abspath ../../..)
RTL_ROOT := $(abspath $(SIM_ROOT)/../rtl)
include $(SIM_ROOT)/mk/rtl-sources.mk

TOPLEVEL := cam_top
COCOTB_TEST_MODULES := tests.top.read_noise.test_read_noise
VERILOG_SOURCES := $(RTL_CAM_TOP)

# 读取路径 pass-through 配置，写入噪声默认关闭
WRITE_NOISE_EN := 0

include $(SIM_ROOT)/mk/cocotb-common.mk

clean::
	rm -rf sim_build