|
|
715a2c2ed6
|
feat(architecture): add CAM hardware block design diagram
- Add docs/architecture/cam_hardware_block_design.drawio
- Diagram illustrates CAM top-level architecture including:
- Host write path with write-priority half-duplex arbiter
- Write noise injector with Bernoulli flip mask
- Banked CAM storage (8 BRAM banks × 512 depth)
- 8-lane match engine pipeline with popcount
- Top-K tracker and result serializer
- Supports documentation for 4096-row × 512-bit hash CAM design
|
2026-05-28 12:09:26 +08:00 |
|
