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refactor(cam): extract match engine into separate module and centralize parameters

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- Split cam_core into pure memory (cam_core.sv) and match engine (match_engine.sv)
- Add cam_params.svh with centralized parameter definitions (NUM_ROWS, HASH_BITS, LANES, etc.)
- Update cam_top.sv to use shared parameters and compose match_engine
- Update Makefile to include new match_engine module and correct Verilator define syntax
This commit is contained in:
SikongJueluo
2026-05-02 22:49:57 +08:00
parent f71bf06484
commit f5daaa2667
5 changed files with 302 additions and 236 deletions
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74
hw/rtl/cam_top.sv
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@@ -1,64 +1,64 @@
`timescale 1ns/1ps
`include "cam_params.svh"
module cam_top #(
parameter int NUM_ROWS = 512,
parameter int HASH_BITS = 512,
parameter int LANES = 16,
parameter int ROW_BITS = $clog2(NUM_ROWS),
parameter int SCORE_BITS = $clog2(HASH_BITS + 1)
) (
module cam_top (
input logic clk,
input logic rst_n,
input logic wr_en,
input logic [ROW_BITS-1:0] wr_row,
input logic [HASH_BITS-1:0] wr_hash,
input logic [(`ROW_BITS)-1:0] wr_row,
input logic [(`HASH_BITS)-1:0] wr_hash,
input logic query_valid,
output logic query_ready,
input logic [HASH_BITS-1:0] query_hash,
input logic [(`HASH_BITS)-1:0] query_hash,
output logic result_valid,
input logic result_ready,
output logic [ROW_BITS-1:0] top1_index,
output logic [SCORE_BITS-1:0] top1_score,
output logic [(`ROW_BITS)-1:0] top1_index,
output logic [(`SCORE_BITS)-1:0] top1_score,
`ifdef SIM_NOISE
input logic [LANES*HASH_BITS-1:0] noise_mask_lanes_flat,
input logic [(`LANES)*(`HASH_BITS)-1:0] noise_mask_lanes_flat,
`endif
`ifdef SIM_DEBUG
output logic [NUM_ROWS*SCORE_BITS-1:0] score_debug_flat,
output logic [(`NUM_ROWS)*(`SCORE_BITS)-1:0] score_debug_flat,
`endif
output logic busy
);
cam_core #(
.NUM_ROWS(NUM_ROWS),
.HASH_BITS(HASH_BITS),
.LANES(LANES),
.ROW_BITS(ROW_BITS),
.SCORE_BITS(SCORE_BITS)
) u_core (
.clk(clk),
.rst_n(rst_n),
.wr_row(wr_row),
.wr_hash(wr_hash),
.wr_en(wr_en),
.query_valid(query_valid),
.query_ready(query_ready),
.query_hash(query_hash),
.result_valid(result_valid),
.result_ready(result_ready),
.top1_index(top1_index),
.top1_score(top1_score),
wire [(`LANES)*(`ROW_BITS)-1:0] rd_addr_lanes_flat;
wire [(`LANES)*(`HASH_BITS)-1:0] rd_hash_lanes_flat;
cam_core u_core (
.clk (clk),
.rst_n (rst_n),
.wr_en (wr_en),
.wr_row (wr_row),
.wr_hash (wr_hash),
.rd_addr_lanes_flat (rd_addr_lanes_flat),
.rd_hash_lanes_flat (rd_hash_lanes_flat)
);
match_engine u_match (
.clk (clk),
.rst_n (rst_n),
.query_valid (query_valid),
.query_ready (query_ready),
.query_hash (query_hash),
.result_valid (result_valid),
.result_ready (result_ready),
.result_row (top1_index),
.result_score (top1_score),
.busy (busy),
.rd_addr_lanes_flat (rd_addr_lanes_flat),
.rd_hash_lanes_flat (rd_hash_lanes_flat)
`ifdef SIM_NOISE
.noise_mask_lanes_flat(noise_mask_lanes_flat),
,.noise_mask_lanes_flat (noise_mask_lanes_flat)
`endif
`ifdef SIM_DEBUG
.score_debug_flat(score_debug_flat),
,.score_debug_flat (score_debug_flat)
`endif
.busy(busy)
);
endmodule