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https://github.com/SikongJueluo/Mini-Nav.git
synced 2026-07-12 20:15:31 +08:00
refactor(cam): remove read noise from noise architecture (Phase 2)
- Make cam_read_noise a pass-through module, removing all noise injection logic - Switch write noise to use noise_mask_bernoulli instead of noise_mask_grouped - Add state machine to cam_write_noise for mask generation timing - Remove noise_mask_grouped.sv (no longer needed) - Remove read noise parameters from cam_noisy and cam_top - Update simulation and benchmark code to reflect read noise removal - Sync documentation to reflect Phase 2 architecture
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@@ -10,7 +10,6 @@ VERILOG_SOURCES := $(RTL_CAM_TOP)
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WRITE_NOISE_EN := 1
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WRITE_NOISE_RATE_NUM := 1
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WRITE_NOISE_RATE_DEN := 100
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READ_NOISE_EN := 0
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include $(SIM_ROOT)/mk/cocotb-common.mk
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@@ -2,7 +2,7 @@
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"""
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CAM 写入噪声（Write Noise）集成测试 —— 专用配置。
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本文件测试 WRITE_NOISE_EN=1, READ_NOISE_EN=0 配置下，
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本文件测试 WRITE_NOISE_EN=1 配置下，
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写入噪声模块的正确性。默认噪声率约 1%（NUM=1, DEN=100）。
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=== 测试列表 ===
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@@ -14,7 +14,7 @@ CAM 写入噪声（Write Noise）集成测试 —— 专用配置。
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=== 架构背景 ===
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写入噪声流水线位置：Write Noise → Banked Core Storage → Read Noise → Match Engine
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写入噪声流水线位置：Write Noise → Banked Core Storage → Match Engine
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本测试覆盖完整的 cam_top 链路，写入噪声为唯一活跃噪声源。
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=== Makefile 子目标 ===
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@@ -30,7 +30,6 @@ import numpy as np
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from cocotb.clock import Clock
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from cocotb.triggers import RisingEdge
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from model.ref_model import (
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generate_write_flip_mask,
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match_top1,
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random_hashes,
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)
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@@ -89,71 +88,7 @@ async def default_noise_reproducible(dut):
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# ═══════════════════════════════════════════════════════════════════════════════
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# 测试 2：精确 RTL-vs-模型 PRNG 掩码匹配
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# ── RTL 存储的哈希与 ref_model.py 生成的掩码逐位一致
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# ═══════════════════════════════════════════════════════════════════════════════
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@cocotb.test()
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async def exact_noise_model_match(dut):
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"""精确噪声模型匹配：RTL 的 PRNG 输出必须与 Python 参考模型逐位一致。
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测试方法：
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1. 用固定 RTL seed 和已知噪声参数，在 Python 中预计算每行的 flip 掩码
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2. 预期存储值 = 原始值 XOR flip_mask
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3. 写入原始值到 RTL，查询预期存储值
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4. 断言每行 score = HASH_BITS（完全匹配）
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这验证了 RTL 的 LFSR 实现与 Python 模型的 PRNG 使用相同的
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多项式、相同的位宽、相同的种子初始化序列。
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"""
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if not hasattr(dut, "score_debug_flat"):
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dut._log.info("Skipping exact_noise_model_match: requires SIM_DEBUG.")
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return
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rtol = None
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atol = None
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cocotb.start_soon(Clock(dut.clk, 10, unit="ns").start())
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await reset_dut(dut)
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hash_bits = dut_hash_bits(dut)
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noise_bits = get_param(dut, "WRITE_NOISE_BITS", 8)
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rate_num = get_param(dut, "WRITE_NOISE_RATE_NUM", 1)
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rate_den = get_param(dut, "WRITE_NOISE_RATE_DEN", 100)
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n_test_rows = 4
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rng = np.random.default_rng(99)
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rows = random_hashes(rng, n_test_rows, width=hash_bits)
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RTL_SEED = 0xB504_F32D_B504_F32D
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prng_state = (RTL_SEED << 64) | RTL_SEED
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expected_stored = []
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for row in rows:
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flip, prng_state = generate_write_flip_mask(
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prng_state,
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hash_bits,
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noise_bits,
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rate_num,
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rate_den,
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)
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expected_stored.append(row ^ flip)
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for idx, val in enumerate(rows):
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await write_row(dut, idx, val)
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for idx, expected in enumerate(expected_stored):
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top1_index, top1_score, score_debug = await query_once(dut, expected)
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assert score_debug is not None, (
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"score_debug required for mask match verification"
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)
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assert int(score_debug[idx]) == hash_bits, (
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f"Row {idx}: expected stored hash to match model prediction, "
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f"score={score_debug[idx]} != {hash_bits}"
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)
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# ═══════════════════════════════════════════════════════════════════════════════
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# 测试 3：零噪声率（WRITE_NOISE_EN=1, RATE_NUM=0）
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# 测试 2：零噪声率（WRITE_NOISE_EN=1, RATE_NUM=0）
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# ── 噪声模块已连接但翻转概率为 0 → 行为应与无噪声一致
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# ═══════════════════════════════════════════════════════════════════════════════
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@@ -195,80 +130,4 @@ async def zero_rate_noise(dut):
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assert np.array_equal(score_debug, expected.scores)
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# ═══════════════════════════════════════════════════════════════════════════════
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# 测试 4：100% 噪声率（RATE_NUM=1, RATE_DEN=1）
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# ── 每组都翻转 → 精确验证 PRNG 掩码生成
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# ═══════════════════════════════════════════════════════════════════════════════
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@cocotb.test()
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async def full_rate_noise(dut):
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"""完全速率噪声：每组 100% 翻转概率。
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使用固定 RTL seed (0xB504F32DB504F32D)，用 Python 模型预计算
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写入全 0 和全 1 行后应存储的哈希值，然后验证 RTL 实际存储的哈希
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与模型预测完全一致。
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这是最低容忍度的噪声测试——要求 score_debug_flat（SIM_DEBUG）
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且每行的分数必须精确等于 HASH_BITS。
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"""
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rate_num = get_param(dut, "WRITE_NOISE_RATE_NUM", 1)
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rate_den = get_param(dut, "WRITE_NOISE_RATE_DEN", 100)
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if rate_num != 1 or rate_den != 1:
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dut._log.info(
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"Skipping full_rate_noise: requires WRITE_NOISE_RATE_NUM=1, RATE_DEN=1."
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)
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return
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if not hasattr(dut, "score_debug_flat"):
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dut._log.info(
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"Skipping full_rate_noise: requires SIM_DEBUG (score_debug_flat)."
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)
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return
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cocotb.start_soon(Clock(dut.clk, 10, unit="ns").start())
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await reset_dut(dut)
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hash_bits = dut_hash_bits(dut)
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num_rows = dut_num_rows(dut)
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noise_bits = get_param(dut, "WRITE_NOISE_BITS", 8)
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all_zero = 0
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all_one = (1 << hash_bits) - 1
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RTL_SEED = 0xB504_F32D_B504_F32D
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prng_state = (RTL_SEED << 64) | RTL_SEED
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flip0, prng_state = generate_write_flip_mask(
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prng_state,
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hash_bits,
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noise_bits,
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rate_num,
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rate_den,
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)
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expected_row0 = all_zero ^ flip0
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flip1, prng_state = generate_write_flip_mask(
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prng_state,
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hash_bits,
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noise_bits,
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rate_num,
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rate_den,
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)
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expected_row1 = all_one ^ flip1
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rows = [0] * num_rows
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rows[0] = all_zero
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rows[1] = all_one
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await write_rows(dut, rows)
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top1_index, top1_score, score_debug = await query_once(dut, expected_row0)
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assert score_debug is not None, "score_debug required for full_rate_noise"
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assert int(score_debug[0]) == hash_bits, (
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f"Row 0: expected exact match, score={score_debug[0]} != {hash_bits}"
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)
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top1_index, top1_score, score_debug = await query_once(dut, expected_row1)
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assert score_debug is not None
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assert int(score_debug[1]) == hash_bits, (
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f"Row 1: expected exact match, score={score_debug[1]} != {hash_bits}"
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)
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