From 715a2c2ed695cc8fcd0e16fac57fcb82758ae741 Mon Sep 17 00:00:00 2001 From: SikongJueluo Date: Thu, 28 May 2026 12:08:10 +0800 Subject: [PATCH] feat(architecture): add CAM hardware block design diagram MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit - Add docs/architecture/cam_hardware_block_design.drawio - Diagram illustrates CAM top-level architecture including: - Host write path with write-priority half-duplex arbiter - Write noise injector with Bernoulli flip mask - Banked CAM storage (8 BRAM banks × 512 depth) - 8-lane match engine pipeline with popcount - Top-K tracker and result serializer - Supports documentation for 4096-row × 512-bit hash CAM design --- .../cam_hardware_block_design.drawio | 95 +++++++++++++++++++ 1 file changed, 95 insertions(+) create mode 100644 docs/architecture/cam_hardware_block_design.drawio diff --git a/docs/architecture/cam_hardware_block_design.drawio b/docs/architecture/cam_hardware_block_design.drawio new file mode 100644 index 0000000..7a6dde9 --- /dev/null +++ b/docs/architecture/cam_hardware_block_design.drawio @@ -0,0 +1,95 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +