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feat(hw): add CAM top-level synthesis infrastructure and fix RTL synthesis compatibility

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- Add hw/syn/Makefile with hier/flat/full synth targets and artifact mirroring
- Add synth_cam_top_hier.ys for hierarchy-preserving resource estimation on Xilinx 7-series
- Add synth_cam_top_flat.ys for flattened Xilinx 7-series synthesis
- Add cam-synth just target for convenient invocation
- Guard runtime assertions (NUM_ROWS/LANES checks, noise seed checks, NOISE_BITS checks)
  behind SYNTHESIS guard in cam_core_banked, cam_read_noise, cam_write_noise, and noise_mask_grouped
- Fix shadowed 'return' variable in random128 xorshift128 function
This commit is contained in:
SikongJueluo
2026-05-18 14:30:52 +08:00
parent b9b5684718
commit 706d148a0b
9 changed files with 169 additions and 1 deletions
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hw/rtl/random/random128.sv
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@@ -42,7 +42,7 @@ module random128 (
next_z = w;
next_w = w ^ (w >> 19) ^ t ^ (t >> 8);
return {next_x, next_y, next_z, next_w};
xorshift128 = {next_x, next_y, next_z, next_w};
end
endfunction