SIM_ROOT := $(abspath ../../..)
RTL_ROOT := $(abspath $(SIM_ROOT)/../rtl)
include $(SIM_ROOT)/mk/rtl-sources.mk

TOPLEVEL := topk_tracker
COCOTB_TEST_MODULES := tests.modules.topk_tracker.test_topk_tracker
VERILOG_SOURCES := $(RTL_ROOT)/core/topk_tracker.sv

include $(SIM_ROOT)/mk/cocotb-common.mk
