ISP/src/modules_tb/windows_tb.cpp

99 lines
2.5 KiB
C++

// For read and write
#include <array>
#include <cstdint>
#include <cstdio>
#include <cstdlib>
#include <fstream>
#include <ios>
#include <iostream>
#include <vector>
// SystemC global header
#include "sysc/communication/sc_clock.h"
#include "sysc/communication/sc_signal.h"
#include "sysc/communication/sc_signal_ifs.h"
#include "sysc/kernel/sc_module.h"
#include <memory>
#include <systemc>
// Include common routines
#include "sysc/kernel/sc_time.h"
#include "verilated_fst_sc.h"
#include <sys/stat.h> // mkdir
#include <utility>
#include <verilated.h>
// Include model
#include "VWindows_tb.h"
using namespace sc_core;
using namespace sc_dt;
int sc_main(int argc, char *argv[]) {
std::cout << "Enter into sc_main\n";
// Create logs/ directory in case we have traces to put under it
Verilated::mkdir("logs");
// Set debug level, 0 is off, 9 is highest presently used
// May be overridden by commandArgs argument parsing
Verilated::debug(0);
// Randomization reset policy
// May be overridden by commandArgs argument parsing
Verilated::randReset(2);
// Before any evaluation, need to know to calculate those signals only used
// for tracing
Verilated::traceEverOn(true);
// Pass arguments so Verilated code can see them, e.g. $value$plusargs
// This needs to be called before you create any model
Verilated::commandArgs(argc, argv);
// Create model
VWindows_tb tb("VWindows_tb");
// General logfile
std::ios::sync_with_stdio();
// You must do one evaluation before enabling waves, in order to allow
// SystemC to interconnect everything for testing.
sc_start(SC_ZERO_TIME);
// If verilator was invoked with --trace argument,
// and if at run time passed the +trace argument, turn on tracing
VerilatedFstSc *tfp = nullptr;
const char *flag = Verilated::commandArgsPlusMatch("trace");
if (flag && 0 == std::strcmp(flag, "+trace")) {
std::cout << "Enabling waves into logs/VWindows_tb.fst\n";
tfp = new VerilatedFstSc;
tb.trace(tfp, 99); // Trace 99 levels of hierarchy
Verilated::mkdir("logs");
tfp->open("logs/VWindows_tb.fst");
}
while (!Verilated::gotFinish()) {
// Flush the wave files each cycle so we can immediately see the output
// Don't do this in "real" programs, do it in an abort() handler instead
if (tfp)
tfp->flush();
// Simulate 1ns
sc_start(1, SC_NS);
}
// Final model cleanup
tb.final();
// Close trace if opened
if (tfp) {
tfp->close();
tfp = nullptr;
}
// Return good completion status
return 0;
}