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SikongJueluo/FPGA_WebLab
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153 Commits 4 Branches 0 Tags
ff7f7b5a76da602f7eeddd5317ff7224968b041c
Commit Graph

9 Commits

Author SHA1 Message Date
SikongJueluo
dc64a65702 feat: add power control 2025-05-20 19:11:29 +08:00
SikongJueluo
f8163be98b fix: matrix key not work 2025-05-20 18:11:04 +08:00
SikongJueluo
e4791b41a8 fix: matrix key not work 2025-05-20 17:23:00 +08:00
SikongJueluo
bea1c7e5ae feat: frontend add virtual matrix key 2025-05-20 17:09:57 +08:00
SikongJueluo
d754a881d7 feat: frontend add set jtag frequency 2025-05-19 21:18:22 +08:00
SikongJueluo
a6ac728cf1 fix: boundary scan could not save 2025-05-19 18:47:15 +08:00
SikongJueluo
ba6ec73b84 fix: frontend upload bitstream failed 2025-05-19 15:56:23 +08:00
SikongJueluo
c39f688115 fix: mother board reactive problem 2025-05-16 16:38:57 +08:00
SikongJueluo
9657aacf83 feat: restore upload jtag bitstream 2025-05-13 21:52:58 +08:00
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