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SikongJueluo/FPGA_WebLab
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239 Commits 4 Branches 0 Tags
683d918d305eaa138fefe4985b6eac7e373b237d
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3 Commits

Author SHA1 Message Date
SikongJueluo
bad64bdfbd fix: 优化界面,解耦组件抽屉 2025-07-13 13:28:45 +08:00
SikongJueluo
28af2df093 feat: 优化工程页面的用户体验,包括删除一些不必要的元素,同时使用storage保存一些界面参数方便用户体验 2025-07-12 18:24:45 +08:00
SikongJueluo
f253a33c83 feat: 完善用户界面,添加绑定与解除绑定的功能 2025-07-12 17:46:23 +08:00
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