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FPGA_WebLab
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28ba709adf380a0a325bbf5e1f487239f4afc74f
Commit Graph
5 Commits
Author
SHA1
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SikongJueluo
9bd3fb29e3
fix: 前后端修复七段数码管无法正常工作的问题
2025-08-16 13:05:01 +08:00
SikongJueluo
774c9575d4
fix: 修复后端数码管无法正常读取/关闭的问题
2025-08-15 15:25:37 +08:00
SikongJueluo
a00cc84e48
fix: 修复数据库与SignalR无法连接的问题
2025-08-15 13:02:56 +08:00
SikongJueluo
56eeb5dce3
feat: 完成数码管websocket通信
2025-08-14 20:25:32 +08:00
SikongJueluo
7bfc362b1f
feat: 完成七段数码管后端
2025-08-14 15:21:18 +08:00