SikongJueluo
/
ISP
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity
47 Commits 1 Branch 0 Tags 11 MiB
Verilog 60.1%
C++ 25.7%
SystemVerilog 8.8%
Coq 4.8%
CMake 0.4%
Other 0.1%
Go to file
SikongJueluo 7e12105a3d
switch lsp to clangd and reconstruct project 		2024-09-15 22:04:48 +08:00
rtl switch lsp to clangd and reconstruct project 2024-09-15 22:04:48 +08:00
src switch lsp to clangd and reconstruct project 2024-09-15 22:04:48 +08:00
.envrc switch lsp to clangd and reconstruct project 2024-09-15 22:04:48 +08:00
.gitignore switch lsp to clangd and reconstruct project 2024-09-15 22:04:48 +08:00
FPGA.nix switch lsp to clangd and reconstruct project 2024-09-15 22:04:48 +08:00
Makefile switch lsp to clangd and reconstruct project 2024-09-15 22:04:48 +08:00
flake.lock switch lsp to clangd and reconstruct project 2024-09-15 22:04:48 +08:00
flake.nix switch lsp to clangd and reconstruct project 2024-09-15 22:04:48 +08:00
xmake.lua switch lsp to clangd and reconstruct project 2024-09-15 22:04:48 +08:00