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SikongJueluo/FPGA_WebLab
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106 Commits 4 Branches 0 Tags
a6ac728cf12a00a1be65b342321c921808a70023
Commit Graph

5 Commits

Author SHA1 Message Date
alivender
bc4f44ecaa feat: remake most of forntend 2025-04-26 19:59:35 +08:00
SikongJueluo
20d4fa12d8 Server: finish jtag controller; Web: finish sibebar animation 2025-04-05 19:41:56 +08:00
SikongJueluo
d766e2ae6a add bun backend and add upload bitstream component 2025-03-18 17:28:21 +08:00
SikongJueluo
9200befaf8 finish basic struction of sidebar 2025-03-11 21:48:37 +08:00
SikongJueluo
8b8eeb8207 init project and finish login page 2025-03-10 19:48:25 +08:00
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