add: 为逻辑分析仪添加了深度、预存储深度、通道组设置

This commit is contained in:
alivender
2025-07-31 13:14:23 +08:00
parent 3257a68407
commit 6b701658d1
8 changed files with 1012 additions and 718 deletions

View File

@@ -46,17 +46,26 @@ static class AnalyzerAddr
/// 111 SOME NUMBER <br/>
/// </summary>
public static readonly UInt32[] SIGNAL_TRIG_MODE = {
BASE + 0x0000_0010,
BASE + 0x0000_0011,
BASE + 0x0000_0012,
BASE + 0x0000_0013,
BASE + 0x0000_0014,
BASE + 0x0000_0015,
BASE + 0x0000_0016,
BASE + 0x0000_0017,
BASE + 0x0000_0010, BASE + 0x0000_0011,
BASE + 0x0000_0012, BASE + 0x0000_0013,
BASE + 0x0000_0014, BASE + 0x0000_0015,
BASE + 0x0000_0016, BASE + 0x0000_0017,
BASE + 0x0000_0018, BASE + 0x0000_0019,
BASE + 0x0000_001A, BASE + 0x0000_001B,
BASE + 0x0000_001C, BASE + 0x0000_001D,
BASE + 0x0000_001E, BASE + 0x0000_001F,
BASE + 0x0000_0020, BASE + 0x0000_0021,
BASE + 0x0000_0022, BASE + 0x0000_0023,
BASE + 0x0000_0024, BASE + 0x0000_0025,
BASE + 0x0000_0026, BASE + 0x0000_0027,
BASE + 0x0000_0028, BASE + 0x0000_0029,
BASE + 0x0000_002A, BASE + 0x0000_002B,
BASE + 0x0000_002C, BASE + 0x0000_002D,
BASE + 0x0000_002E, BASE + 0x0000_002F
};
public const UInt32 LOAD_NUM_ADDR = BASE + 0x0000_0002;
public const UInt32 PRE_LOAD_NUM_ADDR = BASE + 0x0000_0003;
public const UInt32 CAHNNEL_DIV_ADDR = BASE + 0x0000_0004;
public const UInt32 DMA1_START_WRITE_ADDR = DMA1_BASE + 0x0000_0012;
public const UInt32 DMA1_END_WRITE_ADDR = DMA1_BASE + 0x0000_0013;
public const UInt32 DMA1_CAPTURE_CTRL_ADDR = DMA1_BASE + 0x0000_0014;
@@ -198,6 +207,37 @@ public enum SignalValue : byte
SomeNumber = 0b111 // SOME NUMBER
}
/// <summary>
/// 逻辑分析仪有效通道数
/// </summary>
public enum AnalyzerChannelDiv
{
/// <summary>
/// 1路
/// </summary>
ONE = 0x0000_0000,
/// <summary>
/// 2路
/// </summary>
TWO = 0x0000_0001,
/// <summary>
/// 4路
/// </summary>
FOUR = 0x0000_0002,
/// <summary>
/// 8路
/// </summary>
EIGHT = 0x0000_0003,
/// <summary>
/// 16路
/// </summary>
XVI = 0x0000_0004,
/// <summary>
/// 32路
/// </summary>
XXXII = 0x0000_0005
}
/// <summary>
/// FPGA逻辑分析仪客户端用于控制FPGA上的逻辑分析仪模块进行信号捕获和分析
/// </summary>
@@ -239,58 +279,6 @@ public class Analyzer
/// <returns>操作结果成功返回true否则返回异常信息</returns>
public async ValueTask<Result<bool>> SetCaptureMode(bool captureOn, bool force)
{
{
var ret = await UDPClientPool.WriteAddr(this.ep, this.taskID, AnalyzerAddr.LOAD_NUM_ADDR, AnalyzerAddr.CAPTURE_DATA_LENGTH - 1, this.timeout);
if (!ret.IsSuccessful)
{
logger.Error($"Failed to set LOAD_NUM_ADDR: {ret.Error}");
return new(ret.Error);
}
if (!ret.Value)
{
logger.Error("WriteAddr to LOAD_NUM_ADDR returned false");
return new(new Exception("Failed to set LOAD_NUM_ADDR"));
}
}
{
var ret = await UDPClientPool.WriteAddr(this.ep, this.taskID, AnalyzerAddr.PRE_LOAD_NUM_ADDR, AnalyzerAddr.CAPTURE_DATA_PRELOAD - 1, this.timeout);
if (!ret.IsSuccessful)
{
logger.Error($"Failed to set PRE_LOAD_NUM_ADDR: {ret.Error}");
return new(ret.Error);
}
if (!ret.Value)
{
logger.Error("WriteAddr to PRE_LOAD_NUM_ADDR returned false");
return new(new Exception("Failed to set PRE_LOAD_NUM_ADDR"));
}
}
{
var ret = await UDPClientPool.WriteAddr(this.ep, this.taskID, AnalyzerAddr.DMA1_START_WRITE_ADDR, AnalyzerAddr.STORE_OFFSET_ADDR, this.timeout);
if (!ret.IsSuccessful)
{
logger.Error($"Failed to set DMA1_START_WRITE_ADDR: {ret.Error}");
return new(ret.Error);
}
if (!ret.Value)
{
logger.Error("WriteAddr to DMA1_START_WRITE_ADDR returned false");
return new(new Exception("Failed to set DMA1_START_WRITE_ADDR"));
}
}
{
var ret = await UDPClientPool.WriteAddr(this.ep, this.taskID, AnalyzerAddr.DMA1_END_WRITE_ADDR, AnalyzerAddr.STORE_OFFSET_ADDR + AnalyzerAddr.CAPTURE_DATA_LENGTH - 1, this.timeout);
if (!ret.IsSuccessful)
{
logger.Error($"Failed to set DMA1_END_WRITE_ADDR: {ret.Error}");
return new(ret.Error);
}
if (!ret.Value)
{
logger.Error("WriteAddr to DMA1_END_WRITE_ADDR returned false");
return new(new Exception("Failed to set DMA1_END_WRITE_ADDR"));
}
}
// 构造寄存器值
UInt32 value = 0;
if (captureOn) value |= 1 << 0;
@@ -380,7 +368,7 @@ public class Analyzer
return new(new ArgumentException($"Signal index must be 0~{AnalyzerAddr.SIGNAL_TRIG_MODE.Length}"));
// 计算模式值: [2:0] 信号值, [5:3] 操作符
UInt32 mode = ((UInt32)op << 3) | (UInt32) val;
UInt32 mode = ((UInt32)op << 3) | (UInt32)val;
var addr = AnalyzerAddr.SIGNAL_TRIG_MODE[signalIndex];
var ret = await UDPClientPool.WriteAddr(this.ep, this.taskID, addr, mode, this.timeout);
@@ -397,17 +385,96 @@ public class Analyzer
return true;
}
/// <summary>
/// 设置逻辑分析仪的深度、预采样深度、有效通道
/// </summary>
/// <param name="capture_length">深度</param>
/// <param name="pre_capture_length">预采样深度</param>
/// <param name="channel_div">有效通道(0-[1],1-[2],2-[4],3-[8],4-[16],5-[32])</param>
/// <returns>操作结果成功返回true否则返回异常信息</returns>
public async ValueTask<Result<bool>> SetCaptureParams(int capture_length, int pre_capture_length, AnalyzerChannelDiv channel_div)
{
if (capture_length == 0) capture_length = 1;
if (pre_capture_length == 0) pre_capture_length = 1;
{
var ret = await UDPClientPool.WriteAddr(this.ep, this.taskID, AnalyzerAddr.LOAD_NUM_ADDR, (UInt32)(capture_length - 1), this.timeout);
if (!ret.IsSuccessful)
{
logger.Error($"Failed to set LOAD_NUM_ADDR: {ret.Error}");
return new(ret.Error);
}
if (!ret.Value)
{
logger.Error("WriteAddr to LOAD_NUM_ADDR returned false");
return new(new Exception("Failed to set LOAD_NUM_ADDR"));
}
}
{
var ret = await UDPClientPool.WriteAddr(this.ep, this.taskID, AnalyzerAddr.PRE_LOAD_NUM_ADDR, (UInt32)(pre_capture_length - 1), this.timeout);
if (!ret.IsSuccessful)
{
logger.Error($"Failed to set PRE_LOAD_NUM_ADDR: {ret.Error}");
return new(ret.Error);
}
if (!ret.Value)
{
logger.Error("WriteAddr to PRE_LOAD_NUM_ADDR returned false");
return new(new Exception("Failed to set PRE_LOAD_NUM_ADDR"));
}
}
{
var ret = await UDPClientPool.WriteAddr(this.ep, this.taskID, AnalyzerAddr.DMA1_START_WRITE_ADDR, AnalyzerAddr.STORE_OFFSET_ADDR, this.timeout);
if (!ret.IsSuccessful)
{
logger.Error($"Failed to set DMA1_START_WRITE_ADDR: {ret.Error}");
return new(ret.Error);
}
if (!ret.Value)
{
logger.Error("WriteAddr to DMA1_START_WRITE_ADDR returned false");
return new(new Exception("Failed to set DMA1_START_WRITE_ADDR"));
}
}
{
var ret = await UDPClientPool.WriteAddr(this.ep, this.taskID, AnalyzerAddr.DMA1_END_WRITE_ADDR, AnalyzerAddr.STORE_OFFSET_ADDR + (UInt32)(capture_length - 1), this.timeout);
if (!ret.IsSuccessful)
{
logger.Error($"Failed to set DMA1_END_WRITE_ADDR: {ret.Error}");
return new(ret.Error);
}
if (!ret.Value)
{
logger.Error("WriteAddr to DMA1_END_WRITE_ADDR returned false");
return new(new Exception("Failed to set DMA1_END_WRITE_ADDR"));
}
}
{
var ret = await UDPClientPool.WriteAddr(this.ep, this.taskID, AnalyzerAddr.CAHNNEL_DIV_ADDR, (UInt32)channel_div, this.timeout);
if (!ret.IsSuccessful)
{
logger.Error($"Failed to set CAHNNEL_DIV_ADDR: {ret.Error}");
return new(ret.Error);
}
if (!ret.Value)
{
logger.Error("WriteAddr to CAHNNEL_DIV_ADDR returned false");
return new(new Exception("Failed to set CAHNNEL_DIV_ADDR"));
}
}
return true;
}
/// <summary>
/// 读取捕获的波形数据
/// </summary>
/// <returns>操作结果成功返回byte[],否则返回异常信息</returns>
public async ValueTask<Result<byte[]>> ReadCaptureData()
public async ValueTask<Result<byte[]>> ReadCaptureData(int capture_length = 2048 * 32)
{
var ret = await UDPClientPool.ReadAddr4BytesAsync(
this.ep,
this.taskID,
AnalyzerAddr.STORE_OFFSET_ADDR,
AnalyzerAddr.CAPTURE_DATA_LENGTH,
capture_length,
this.timeout
);
if (!ret.IsSuccessful)
@@ -416,7 +483,7 @@ public class Analyzer
return new(ret.Error);
}
var data = ret.Value;
if (data == null || data.Length != AnalyzerAddr.CAPTURE_DATA_LENGTH * 4)
if (data == null || data.Length != capture_length * 4)
{
logger.Error($"Capture data length mismatch: {data?.Length}");
return new(new Exception("Capture data length mismatch"));